ESP32 Forum

ESP-ROM:esp32c3-api1-20210207
Build:Feb 7
2021
rst:0x1 (POWERON),boot:0xe (SPI_FAST_FLASH_BOOT)
SPIWP:0xee
mode:DIO, clock div:2
load:0x3fcd5820,len:0x1574
load:0x403cc710,len:0xc18
load:0x403ce710,len:0x2ffc
entry 0x403cc71a
I (32) boot: ESP-IDF v5.4.1-643-g8ad0d3d8f2-dirty 2nd stage bootloader
I (32) boot: compile time Nov 27 2025 11:53:00
I (32) boot: chip revision: v0.4
I (34) boot: efuse block revision: v1.3
I (38) boot.esp32c3: SPI Speed : 40MHz
I (41) boot.esp32c3: SPI Mode : DIO
I (45) boot.esp32c3: SPI Flash Size :
4MB
I (49) boot: Enabling RNG early entropy source...
I (53) boot: Partition Table:
I (56) boot: ## Label Usage Type ST Offset Length
I (62) boot: 0 otadata OTA data 01 00 0000d000 00002000
I (69) boot: 1 phy_init RF data 01 01 0000f000 00001000
I (75) boot: 2 nvs WiFi data 01 02 00010000 0000e000
I (82) boot: 3 at_customize unknown 40 00 0001e000 00042000
I (88) boot: 4 ota_0 OTA app 00 10 00060000 001d0000
I (95) boot: 5 ota_1 OTA app 00 11 00230000 001d0000
I (101) boot: End of partition table
I (105) esp_image: segment 0: paddr=00060020 vaddr=3c170020 size=2b67ch (177788) map

I (151) esp_image: segment 1: paddr=0008b6a4 vaddr=3fc98c00 size=04248h ( 16968) load
I (155) esp_image: segment 2: paddr=0008f8f4 vaddr=40380000 size=00724h ( 1828) load
I (156) esp_image: segment 3: paddr=00090020 vaddr=42000020 size=16c7c8h (1492936) map

I (484) esp_image: segment 4: paddr=001fc7f0 vaddr=40380724 size=184b4h ( 99508) load
I (508) es
p_image: segment 5: paddr=00214cac vaddr=50000000 size=0021ch ( 540) load
I (516) boot: Loaded app from partition at offset 0x60000
I (516) boot: Disabling RNG early entropy source...

I (1034) at-init: at param mode: 1

I (1113) at-init: module_name: ESP32C3-SPI
I (1115) at-init: max tx power=78, ret=0
I (1117) at-init: v4.2.0.0-dev (unknown)
E (1118) at-spi: invalid data:0 or len:0

ESP-ROM:esp32c3-api1-20210207
Build:Feb 7 2021
rst:0x1 (POWERON),boot:0xc (SPI_FAST_FLASH_BOOT)
SPIWP:0xee
mode:DIO, clock div:2
load:0x3fcd58
20,len:0x1574
load:0x403cc710,len:0xc18
load:0x403ce710,len:0x2ffc
entry 0x403cc71a
I (32) boot: ESP-IDF v5.4.1-643-g8ad0d3d8f2-dirty 2nd stage bootloader
I (32) boot: compile time Nov 27 2025 11:53:00
I (32) boot: chip revision: v0.4
I (34) boot: efuse block revision: v1.3
I (38) boot.esp32c3: SPI Speed : 40MHz
I (41) boot.esp32c3: SPI Mode : DIO
I (45) boot.esp32c3: SPI Flash Size : 4MB
I (49) boot: Enabling RNG early entropy source...
I (53) boot: Partition Table:
I (56) boot: ## Label Usage Type ST Offset Length
I (62) boot: 0 otadata OTA data 01 00 0000d000 00002000
I (69) boot: 1 phy_init RF da
ta 01 01 0000f000 00001000
I (75) boot: 2 nvs WiFi data 01 02 00010000 0000e000
I (82) boot: 3 at_customize unknown 40 00 0001e000 00042000
I (88) boot: 4 ota_0 OTA app 00 10 00060000 001d0000
I (95) boot: 5 ota_1 OTA app 00 11 00230000 001d0000
I (101) boot: End of partition table
I (105) esp_image: segment 0: paddr=00060020 vaddr=3c170020 size=2b67ch (177788) map

I (151) esp_image: segment 1: paddr=0008b6a4 vaddr=3fc98c00 size=04248h ( 16968) load
I (155) esp_image: segment 2: paddr=0008f8f4 vaddr=40380000 size=00724h ( 1828) load
I (156) esp_image: segment 3: paddr=00090020 vaddr=42000020 size=16c7c8h (1492936) map

I (484) esp_image: segment 4: paddr=001fc7f0 vaddr=40380724 size=184b4h ( 99508) load
I (508) esp_image: segment 5: paddr=00214cac vaddr=50000000 size=0021ch ( 540) load
I (516) boot: Loaded app from partition at offset 0x60000
I (516) boot: Disabling RNG early entropy source...

I (1034) at-init: at param mode: 1

I (1109) at-init: module_name: ESP32C3-SPI
I (1110) at-init: max tx power=78, ret=0
I (1112) at-init: v4.2.0.0-dev (unknown)
E (1113) at-spi: invalid data:0 or len:0
STM32使用SPI2设置，运行esp-at\examples\at_spi_master\sdspi\STM32
通过调试STM32可以发现程序一直卡在sdspi_host.c→esp_err_t sdspi_cmd_init()→while (err == ESP_ERR_INVALID_RESPONSE) {

snprintf(msg, sizeof(msg), "Please restart slave and test again,error code:%d", err);
HAL_UART_Transmit(&huart1, (uint8_t*)msg, strlen(msg), HAL_MAX_DELAY);
ESP_AT_LOGE(TAG, "Please restart slave and test again,error code:%d", err);
ESP32_C2_RST();

err = at_spi_cmd_go_idle_state();
at_do_delay(1000);
}

STM32 那个 SDSPI 的 demo 是对应 ESP32 使用 SDIO AT 的。
对于 C3 SPI 来说，我们没有提供 STM32 的 master 示例，只是提供了 ESP 作为 master 的示例（https://github.com/espressif/esp-at/tre ... 2_c_series），对于 STM32 来说，你需要自己开发， 可以参考我们的协议文档（https://docs.espressif.com/projects/esp ... PI_AT.html）。