make some jitters inside ULP/RISC-V.

alhyene
Posts: 1
Joined: Sat Mar 14, 2026 7:58 pm

make some jitters inside ULP/RISC-V.

Postby alhyene » Sat Mar 14, 2026 8:43 pm

Hi, did you know how to "calibrate" RTC_SLOW_CLK with arbitrates values ?

I want to make some jitters inside ULP/RISC-V.

Thanks,
8^)

alhyene
Posts: 1
Joined: Sat Mar 14, 2026 7:58 pm

Re: make some jitters inside ULP/RISC-V.

Postby alhyene » Sat Mar 14, 2026 8:59 pm

In fact with someting like :

REG_SET_FIELD(TIMG_RTCCALICFG2_REG(0), RTC_CNTL_SCK_DCAP, rand());

???

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