Will ESP32-S31 GCC support autovectorization?
Will ESP32-S31 GCC support https://gcc.gnu.org/onlinedocs/gcc/Vect ... sions.html ?
Is the SIMD instruction set more ESP32-S3 or RISCV SIMD?
Tell us about the SIMD support
Moderator: bongjiajun
Re: Tell us about the SIMD support
Not sure about autovectorization, but you can assume that given the S31 core is RiscV, the PIE will be (possibly a superset of) the PIE found in the ESP32P4.
-
Bryght-Richard
- Posts: 98
- Joined: Thu Feb 22, 2024 3:59 pm
-
andylinpersonal
- Posts: 27
- Joined: Wed Jan 19, 2022 2:21 am
Re: Tell us about the SIMD support
Some hint from the agent skills. But lacks instruction cycles of SIMD instructions and overhead of unaligned access.
-
MicroController
- Posts: 2661
- Joined: Mon Oct 17, 2022 7:38 pm
- Location: Europe, Germany
Re: Tell us about the SIMD support
On the S3, and AFAIK on the P4 too, there are no unaligned memory accesses via the SIMD. Every access is always aligned, see the S3's TRM for example.
Who is online
Users browsing this forum: No registered users and 1 guest
