For a project, I plan on attaching an ESP32 to a CAN bus.
I am aware I need a CAN transceiver in both cases, but is there any reason to use a MCP2515 CAN controller I interface with via SPI, over the ESP32 built-in CAN controller?

Note that the ESP32 doesn't have a "CPU cache". Both cores operate directly on the shared SRAM. (I assume there's some hardware arbiter in place to serialize concurrent physical accesses, but that happens fully transparently.)
"The cache" on an ESP32 usually refers to the part of the SRAM which is ...

From what I know, it is possible for one core of the ESP32 to read a different value from a memory address than the other, if either of them has the memory region in question in its cache.
Is there any available function that forces one or both cores to flush and/or reload all or some of the cached ...

This piqued my interest so I made a patched BASIC initialiser: https://github.com/boarchuz/esp32_rom_tinybasic_patch

There is also a little (208 bytes!) prebuilt binary included that you can write to 0x1000 to boot straight into the BASIC interpreter.

It works on my chip, thank you for this!

It is somewhat well known that the ESP32 ROM comes with a version of the language Basic that could be activated by inhibiting reads from the SPI flash. However, as this post on this forum states , the eFuse required for the interpreter has been permanently disabled on all ESPs produced after a ...