Setting a RTC_GPIO in esp_wake_deep_sleep()

[NRollo]

On a ESP32-D0WD module I am trying to set RTC_GPIO8 (GPIO33) in the esp_wake_deep_sleep() function using the esp-idf framework. This obviously means some REG_WRITE() and REG_READ() register "joggling".

So far I have come up with this (which apparently is not enough):

Code: Untitled.c Select all

    // Enable GPIO output

    REG_WRITE(RTC_GPIO_ENABLE_W1TS_REG, REG_READ(RTC_GPIO_ENABLE_REG) | BIT(RTC_GPIO_ENABLE_W1TS_S + 8));



    // Set the GPIO output bit high

    REG_WRITE(RTC_GPIO_OUT_W1TS_REG, REG_READ(RTC_GPIO_OUT_REG) | BIT(RTC_GPIO_OUT_DATA_W1TS_S + 8));

Can anyone give me at hint on what ESP32 registers to use right after deep sleep wakeup, in order to set GPIO33 (RTC_GPIO8) to high?

Thanks!

[NRollo]

I found a solution, this will do the trick:

Code: Untitled.c Select all

void RTC_IRAM_ATTR esp_wake_deep_sleep(void) {

    // Output - set RTC mux

    SET_PERI_REG_MASK(RTC_IO_XTAL_32K_PAD_REG, BIT(RTC_IO_X32N_MUX_SEL_S));

 

    // Output - clear the HOLD bit

    CLEAR_PERI_REG_MASK(RTC_IO_XTAL_32K_PAD_REG, BIT(RTC_IO_X32N_HOLD_S));

 

    // Output - enable GPIO output

    REG_WRITE(RTC_GPIO_ENABLE_W1TS_REG, BIT(RTC_GPIO_ENABLE_W1TS_S + GPIO_NUM_8));

 

    // Ouput - set the GPIO output high

    REG_WRITE(RTC_GPIO_OUT_W1TS_REG, BIT(RTC_GPIO_OUT_DATA_W1TS_S + GPIO_NUM_8));

    ets_delay_us(450000);

    // Ouput - clear the GPIO output

    REG_WRITE(RTC_GPIO_OUT_W1TC_REG, BIT(RTC_GPIO_OUT_DATA_W1TS_S + GPIO_NUM_8));

}