ESP32C6 - Wakeup while Lp core wait for interrupt or halt

[xryl669]

Hi,

I'm doing a very low power product where I'm saving the very last joule I can. In this case, I've done this:

• HP core is woken up very very very rarely (only for communicating)
• HP core deep sleep for a given amount of time and wake up the LP core
• LP core sets up two interrupt handler (one for monitoring a pin that's set when some external event occurs) and a timer (if the event doesn't occurs in time, it wakes up the HP core with an error set in the shared RTC memory)
• LP core enters "wait for interrupt" (wfi) state.

Currently, while in deep sleep, the complete board consumes ~60µA (which is still a bit high w.r.t the devices on the board, but let's accept this). When the LP core is running and in "WFI" state, the board consumes ~240µA to 300µA which is a bit high (but again, let's accept this).

The documentation here state: (in ulp_lp_core_halt):

To stop the ULP from waking up, call ulp_lp_core_lp_timer_disable() before halting.

So I understood this as it was possible to program the LP core to wake up periodically. And the LP core would call ulp_lp_core_halt and it would be woken up anyway for the second period. I don't observe this. As soon as the LP core call halt, it's not woken up anymore.

In the LP core code, for programming a timer, it's using the undocumented ulp_lp_core_lp_timer_set_wakeup_time which is, underneath, using this. For the gpio interrupt, it's using the undocumented ulp_lp_core_gpio_intr_enable.

All of this is working well, except for the large power consumption.

Since the microcontroller is only consuming 60µA in deep sleep while being able to wake up from a timer or a GPIO interrupt, I wonder if:

1. Is it possible for the LP core to halt while (re)programming the deep sleep's wake up source ?
2. If yes, then a function to do so would like be better than trying to deal with LP core internal's machinery. Since in most use case, using the LP core is for power reason, it seems dumb to waste power in WFI mode while a lower power domain exists doing the same thing ?
3. If not, would it be possible to write a wakeup stub (which, on ESP32C6 is done by writing to the 10 ALWAYS ON REGISTERS, which are thus accessible to LP core) that only does that? The idea being to program the wakeup stub to one that's setting the new wakeup source for the LP core and wake up the HP core so it can set the wakeup source and reenter deep sleep immediately?
4. Couldn't find how the deep sleep code is programming the wake up source. The only code I've found is no different than programming from the LP core. Yet, when I do this in the LP core and halt, it doesn't work, the LP core doesn't wake up again.

I've understood it's not possible to set up 2 different wake up sources in deep sleep (said here). So this would still prevent some use case but for simple case, waiting in deep sleep would be a lot better.

[xryl669]

Well, it turns out it's completely possible to set up 2 wake up sources from deep sleep, so the above is actually not required. In the end, for simple interrupt based solution, running the LP core isn't actually required, or, only to assert the state of the system once one of the interrupt has triggered.

So I'm answering my own question above for any who's interested:

1. It's possible for the LP core to halt. And interrupt that's programmed and triggered will wake up the LP core from start
2. So the "Wait for interrupt" state is only useful when you need to keep a running state between call. Yet, since RTC memory is saved in deep sleep, the WFI state is IMHO useless. Just store which state you were before halting and check what condition woken you up from deep sleep and you're not burning 300µA in WFI state for nothing (and instead falls back to 10µA for deep sleep, a 30x reduction in current)
3. I'm pretty sure using a wakeup stub for doing "state checking" doesn't actually make sense, since you can do the same in LP core's lower power consumption path. So the idea might work, but it's useless. The only case I would see an advantage is for ADC reading on ESP32C6. For example, if you need to monitor the battery voltage/level, you can't do that with LP core on ESP32C6 (because the ADC power domain isn't active when HP core is sleeping). So the idea would be to program the wake up stub to take a reading of the ADC, write the result to RTC memory (or decide to wake up the HP core upon specific condition) and go back to sleep. That would avoid the huge penalty of a complete HP core wakeup (hundred of ms with ~10mA of consumption).
4. It turns out it's the same code. Any enabled interrupt wakes up the LP core in deep sleep.

[arc12_esp]

@xryl669 - did you make working code to read ADC from the wake-up stub?

I cannot make it work!

It would be good to check whether the device is running on a "coin cell", e.g. during battery change, and abort a HP wake-up if so.

[JoeSensoric]

For example, if you need to monitor the battery voltage/level, you can't do that with LP core on ESP32C6 (because the ADC power domain isn't active when HP core is sleeping).

That's right, but with other ESP32-models it's possible. I'm using the original ESP32-ULP to check ADC-input from an LDR four times a second.

It should also be possible with the ESP32-S3:
https://github.com/espressif/esp-idf/tr ... _riscv/adc

Perhaps this can be a low power solution.