UART Not Working on LP Core After Main Core Wakeup and lp core operation resume (ESP32-C6, IDF 5.4.1)

[Pika@123]

Hi community,

I’m working on a dual-core application on ESP32-C6 using ESP-IDF v5.4.1, where both the Main Core and the LP Core handle peripherals like UART, I2C, and GPIO interrupts.

Here’s what I’m doing in detail:

Flow of Operation:
At startup, the Main Core initializes the LP Core and starts its operation.

The LP Core runs continuously (no sleep), using its own UART, I2C, and interrupt handlers.

I use separate GPIO init/deinit APIs for each core (lp_core_* and standard gpio_* functions).

At some point, the Main Core enters deep sleep, and the LP Core continues functioning.

Later, the LP Core wakes up the Main Core using an interrupt.

In the LP Core code, I explicitly call ulp_lp_core_stop() to stop LP Core execution once the Main Core wakes up.

The Main Core performs some tasks, then:

Re-initializes the LP Core,

Uses ulp_lp_core_sw_intr_trigger() to resume LP Core operation,

And then goes back to deep sleep.

The Issue:
After the LP Core is resumed using ulp_lp_core_sw_intr_trigger(), its UART stops working.

This does not happen during the initial startup: UART works fine on the LP Core when the Main Core is asleep.

I suspect I2C and interrupts might also be affected, but I cannot confirm since UART is my only debugging tool on the LP Core side.

The LP Core code remains the same and is intended to run continuously after it's resumed.

Questions:
Is there any known sequence or requirement to properly resume LP Core peripheral functions, especially UART, after stopping it via ulp_lp_core_stop() and resuming via ulp_lp_core_sw_intr_trigger()?

Do I need to reinitialize UART (or its clocks) explicitly when restarting the LP Core?

Is there any example or reference on how to properly share GPIO pins between Main Core and LP Core, including how to init/deinit GPIOs cleanly for both cores?

Could this be related to clock gating, power domains, or peripheral context loss when stopping and restarting the LP Core?

Additional Notes:
I ensure I use correct peripheral init/deinit APIs for both cores.

I'm using GPIO4 and GPIO5 for LP Core UART.

The LP Core runs on RTC domain, and I’m careful to maintain power domains and avoid unnecessary sleeps.

I cannot use ulp_lp_core_wait_for_intr() because the LP Core must continue running every 1 second for processing.

Any help, insights, or working examples would be greatly appreciated!

Thanks in advance.