ESP32: Memory retained on Reset

[Robert040]

Hi,

I like to store a value in memory that is retained after a reset. The value is used to distinguish between a power-on reset and a (manual) hardware reset. The succession of multiple resets is taken by the application to enter a special configuration mode.
Something like https://github.com/datacute/DoubleResetDetector , but then for ESP32.

For this, the variable attribute __NOINIT_ATTR and RTC_NOINIT_ATTR are available.

However, after some testing, I found that the variables stored at a .noinit segment only keep value after a software restart
but [b]contain some pseudo random data after HW reset[/b].

The question is why is that?
What is different in program startup from HW-reset to an SW-reset?
I expect this Static RAM to retain its value when it remains powered.
Or is there some bootloader activity that overwrites those particular memory parts?




------
[code]
__NOINIT_ATTR uint32_t noinit_DetectFlag1; // @ 0x3FFC3D94, After reset 0x0DD08974 , overwritten by bootloader(?)
RTC_NOINIT_ATTR uint32_t noinit_DetectorFlag2; // @ 0x50000208, After reset 0x6B326EA9 , overwritten by bootloader(?)
[/code]

Running on ESP32 (Wroom32)
platform = espressif32
framework = arduino
board = nodemcu

[Sprite]

The ESP32 does not distinguish between a power-on reset and a hardware reset: in both cases, during the reset, the chip is powered down and as such any SRAM loses its value. You could use a NVS variable instead; those get saved to flash.

[Robert040]

From a power-on situation, I can understand that uninitialized SRAM contains random data.
The HW reset pulls the CHIP_PU pin down but Vdd and Vdd_RTC remains at 3.3V. With the power-up pin low, the ESP internals get powered down, I now see from the specs.

The few milliseconds of CHIP_PU=LOW are apparently already enough to lose all its content, even the low-power RTC memory... Strange. (All SRAM I used before took a long time to lose their content; also a little remaining voltage would keep their state)

In my opinion, it is unwise to use NVS that involves flash writes in a moment of time when you can expect HW resets.
Can anybody vouch that NVS, like emulated EEPROM or the Preferences store, are safe from power-fail and sudden resets?

[Sprite]

In my opinion, it is unwise to use NVS that involves flash writes in a moment of time when you can expect HW resets.
Can anybody vouch that NVS, like emulated EEPROM or the Preferences store, are safe from power-fail and sudden resets?

Yes, NVS is atomic, that is, after a power failure while a value update is in progress, depending on how far the update got, you either see the updated value or the previous value, never something else (so neither a 'halfway' value nor a corrupted NVS).

[lbernstone]

The Preferences and EEPROM libraries use NVS on the backend. The behavior of the underlying keystore is all the same. It always writes into open space, and "gravestones" the old data, so it has safe behavior as Sprite mentioned. You do need to be careful not overuse the flash, so make sure you have a technique that only writes infrequently to the store.

[Robert040]

Thanks very much, that is usable information.