Wrong bit order using SPI master on ESP32-C6

[Hagen Hentschel]

Hi,

I'm writing some code to send some octets in half-duplex mode, as SPI master. Using latest ESP-IDF v5.5.1 on ESP32C6. I already have the same SPI communication working from a PC using a simple FT232H dongle.

The problem is, despite the documentation stating bytes are played out MSBF, in reality it's LSBF. I set up the SPI bus and the device following the book, nothing fancy. It's mode 0.

I don't really care about using DMA or not - I have small packets and don't need a fast clock. Either using DMA or disabling it produces the same behavior (at SPI bus init).

I found this by analyzing the SPI lines with a Saleae Pro 8, comparing it to the working (FTDI) version.

All octets are bit-reflected.

Example: When I write 0x01 with the FTDI, over the wire I see 10000000. Which corresponds to their manual, MSBF, exactly what I need. I do the same with the ESP32C6, it's all reversed, despite me having not set any such flag.

I already triple-checked my configuration structs, making sure they are default-initialized, etc..
I even checked the ESP32C6 SPI control register for SPI2, the bits are set to MSBF mode for RD and WR (both==00). But: to no avail - doesn't work!

So, what's the matter here? Seems a very serious bug that disables any regular use of the whol SPI (master) component. Did nobody notice yet ? Hard to imagine.

[Sprite]

Example: When I write 0x01 with the FTDI, over the wire I see 10000000. Which corresponds to their manual, MSBF, exactly what I need.

That would actually be LSBF. Your least significant bit is 1 and that is sent first.