ESP32-S3 WROOM MCN 16R8. Enabling PSRAM causes crash immediately after main()

[BrianP]

Hello and thanks in advance for the help.

I purchased some ESP32-S3 WROOM MCN 16R8 off Aliexpress. I have never used PSRAM before but I figured it was work a try.

My application works fine until I enable PSRAM in config (I am in VSCODE). If I enable PSRAM, it makes it to main(), sends out my banner, initializes IO hits the I2C error (which isn't an error), then crashed with

ESP-ROM:esp32s3-20210327
Build:Mar 27 2021
rst:0x8 (TG1WDT_SYS_RST),boot:0x2b (SPI_FAST_FLASH_BOOT)
Saved PC:0x4037589f
--- 0x4037589f: panic_enable_cache at C:/Espressif/frameworks/esp-idf-v5.5.2/components/esp_system/port/panic_handler.c:285
SPIWP:0xee
mode:DIO, clock div:1
load:0x3fce2820,len:0x15c8
load:0x403c8700,len:0xce4
load:0x403cb700,len:0x2f40
entry 0x403c8920


I notice that in the trace it says
I (1002) esp_psram: Adding pool of 8192K of PSRAM memory to heap allocator
But the documentation says ESP32 can only handle 4M of external memory.

The crash says panic_enable_cache and I have looked through the documentation and, while there are numerous comments about problems with PSRAM if the cache is disabled I can't find references to disabling the cache in VSCODE config.

In detail

ESP-ROM:esp32s3-20210327
Build:Mar 27 2021
rst:0x8 (TG1WDT_SYS_RST),boot:0x2b (SPI_FAST_FLASH_BOOT)
Saved PC:0x4037589f
--- 0x4037589f: panic_enable_cache at C:/Espressif/frameworks/esp-idf-v5.5.2/components/esp_system/port/panic_handler.c:285
SPIWP:0xee
mode:DIO, clock div:1
load:0x3fce2820,len:0x15c8
load:0x403c8700,len:0xce4
load:0x403cb700,len:0x2f40
entry 0x403c8920
I (24) boot: ESP-IDF v5.5.2 2nd stage bootloader
I (24) boot: compile time Jan 27 2026 11:30:14
I (24) boot: Multicore bootloader
I (25) boot: chip revision: v0.2
I (25) boot: efuse block revision: v1.3
I (25) boot.esp32s3: Boot SPI Speed : 80MHz
I (25) boot.esp32s3: SPI Mode : DIO
I (25) boot.esp32s3: SPI Flash Size : 16MB
W (25) boot.esp32s3: PRO CPU has been reset by WDT.
W (26) boot.esp32s3: APP CPU has been reset by WDT.
I (26) boot: Enabling RNG early entropy source...
I (26) boot: Partition Table:
I (26) boot: ## Label Usage Type ST Offset Length
I (27) boot: 0 nvs WiFi data 01 02 00009000 00004000
I (27) boot: 1 storage Unknown data 01 82 0000d000 00004000
I (28) boot: 2 certs Unknown data 01 82 00011000 00004000
I (28) boot: 3 otadata OTA data 01 00 00015000 00002000
I (28) boot: 4 phy_init RF data 01 01 00017000 00001000
I (29) boot: 5 ota_0 OTA app 00 10 00020000 00177000
I (29) boot: 6 ota_1 OTA app 00 11 001a0000 00177000
I (30) boot: 7 internal Unknown data 01 81 00317000 00c00000
I (30) boot: End of partition table
I (30) esp_image: segment 0: paddr=00020020 vaddr=3c0e0020 size=2bce0h (179424) map
I (62) esp_image: segment 1: paddr=0004bd08 vaddr=3fc9ba00 size=04310h ( 17168) load
I (66) esp_image: segment 2: paddr=00050020 vaddr=42000020 size=d43c4h (869316) map
I (220) esp_image: segment 3: paddr=001243ec vaddr=3fc9fd10 size=01434h ( 5172) load
I (221) esp_image: segment 4: paddr=00125828 vaddr=40374000 size=179f0h ( 96752) load
I (243) esp_image: segment 5: paddr=0013d220 vaddr=50000000 size=00020h ( 32) load
I (252) boot: Loaded app from partition at offset 0x20000
I (253) boot: Disabling RNG early entropy source...
I (254) octal_psram: vendor id : 0x0d (AP)
I (254) octal_psram: dev id : 0x02 (generation 3)
I (254) octal_psram: density : 0x03 (64 Mbit)
I (254) octal_psram: good-die : 0x01 (Pass)
I (255) octal_psram: Latency : 0x01 (Fixed)
I (255) octal_psram: VCC : 0x01 (3V)
I (255) octal_psram: SRF : 0x01 (Fast Refresh)
I (256) octal_psram: BurstType : 0x01 (Hybrid Wrap)
I (256) octal_psram: BurstLen : 0x01 (32 Byte)
I (256) octal_psram: Readlatency : 0x02 (10 cycles@Fixed)
I (257) octal_psram: DriveStrength: 0x00 (1/1)
I (257) esp_psram: Found 8MB PSRAM device
I (258) esp_psram: Speed: 40MHz
I (258) cpu_start: Multicore app
I (989) esp_psram: SPI SRAM memory test OK
I (998) cpu_start: Pro cpu start user code
I (998) cpu_start: cpu freq: 160000000 Hz
I (998) app_init: Application information:
I (998) app_init: Project name: BeeController
I (998) app_init: App version: 1
I (999) app_init: Compile time: Jan 27 2026 12:28:56
I (999) app_init: ELF file SHA256: 66445dae2...
I (999) app_init: ESP-IDF: v5.5.2
I (999) efuse_init: Min chip rev: v0.0
I (1000) efuse_init: Max chip rev: v0.99
I (1000) efuse_init: Chip rev: v0.2
I (1000) heap_init: Initializing. RAM available for dynamic allocation:
I (1001) heap_init: At 3FCA6438 len 000432D8 (268 KiB): RAM
I (1001) heap_init: At 3FCE9710 len 00005724 (21 KiB): RAM
I (1001) heap_init: At 3FCF0000 len 00008000 (32 KiB): DRAM
I (1001) heap_init: At 600FE000 len 00001FE8 (7 KiB): RTCRAM
I (1002) esp_psram: Adding pool of 8192K of PSRAM memory to heap allocator
I (1003) spi_flash: detected chip: generic
I (1003) spi_flash: flash io: dio
I (1004) sleep_gpio: Configure to isolate all GPIO pins in sleep state
I (1005) sleep_gpio: Enable automatic switching of GPIO sleep configuration
I (1005) main_task: Started on CPU0
I (1015) esp_psram: Reserving pool of 32K of internal memory for DMA/internal allocations
I (1015) main_task: Calling app_main()



***************************
BeeCool ver Jan 27 2026 12:29:21
E (1025) i2c.master: this port has not been initialized, please initialize it first
--- Warning: Writing to serial is timing out. Please make sure that your application supports an interactive console and that you have picked the correct console for serial communication.
ESP-ROM:esp32s3-20210327
Build:Mar 27 2021
rst:0x8 (TG1WDT_SYS_RST),boot:0x2b (SPI_FAST_FLASH_BOOT)
Saved PC:0x4037589f
--- 0x4037589f: panic_enable_cache at C:/Espressif/frameworks/esp-idf-v5.5.2/components/esp_system/port/panic_handler.c:285


My PSRAM setting are OCTAL as per the data sheet,
Auto-detect,
40Mhz,
Initialise the PSRAM related hardware
Initialize PSRAM during startup, including the hardware and memory related configurations
Pre-configure memory protection for PSRAM
SPI Ram Access Method Make Ram Allocatable using malloc() as well

(I can't figure out how to show a screen grab).

Please help. I have read the documentation but I must be missing something.

[MicroController]

But the documentation says ESP32 can only handle 4M of external memory.

That's true for the ESP32, but not for the ESP32-S3.

Code: Select all

...
I (257) octal_psram: DriveStrength: 0x00 (1/1)
I (257) esp_psram: Found 8MB PSRAM device

Indicates that communication with the PSRAM does work initially.

Check if you're inadvertently reconfiguring any of the PSRAM's OPI IO pins (esp. GPIO33-37) in your setup code.

[BrianP]

"Check if you're inadvertently reconfiguring any of the PSRAM's OPI IO pins (esp. GPIO33-37) in your setup code."

That was it! Thank you so much! I missed the note on page 11 of the ESP32-S3 Wroom data sheet which says

"b In module variants that have embedded OSPI PSRAM, i.e., that embed ESP32-S3R8, pins IO35,
IO36, and IO37 connect to the OSPI PSRAM and are not available for other uses."

I mapped IO37 to IO38, recompiled, and it works fine. A minor change to the PCB and IO37 was driving an optional feature for me regardless.