ESP32-WROOM32 Unused Pins & EMI Best Practices

subhadeep
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Joined: Tue Mar 17, 2026 5:52 am

ESP32-WROOM32 Unused Pins & EMI Best Practices

Postby subhadeep » Tue Mar 17, 2026 5:55 am

I’m finalizing a PCB design using an ESP32-WROOM-32E module. The board is powered by a 5V Meanwell SMPS stepped down to 3.3V via an LDO. I have a handful of unused GPIOs left over. I want to make sure these don't act as microscopic antennas and cause me to fail radiated emissions testing, especially given the aggressive 2.4GHz Wi-Fi spikes.

I’d love to get your real-world advice on a few specific best practices for these unused pins:

Firmware vs. Hardware Terminations
For standard, non-strapping unused pins, is it better for EMI to configure them in firmware as OUTPUT driven LOW, or as INPUT_PULLUP/INPUT_PULLDOWN?

Do you ever bother adding physical external pull-down resistors to unused pins on a Wi-Fi SoC, or is the internal silicon termination sufficient for passing compliance?

Physical PCB Layout for Unused Pads
When leaving a pin unused, should I leave the copper pad completely unrouted (no traces at all to minimize surface area)?

Alternatively, is there any EMC benefit to routing the unused pads directly to the adjacent solid ground plane through a via?

Handling Unused Strapping Pins
I have unused strapping pins (e.g., IO0, IO12, IO15). Since I can't hard-tie these to ground or 3.3V without risking a boot failure, how do you handle these physically on the PCB to minimize noise coupling? Just leave the pads floating and rely on internal pull-ups/downs?

Ground Pour and Clearance
Should I allow the top-layer ground pour to flood into the spaces between the unused ESP32 pads, or is it better to maintain a small keep-out zone around the unused pins so they don't couple with the ground plane?

Thanks in advance for your insights!

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