looking at the traces from the logic analyzer I see that the one I did on the Teensy show a very stable 100KHz clock signal. On the trace I did on the ESP32 the clock signal is more like 98-99kHz, and does have some weird ticks, like for instance the 65kHz tick in the screenshot below.

With regards to the FreeRTOS tick period, it is set to 100, which I assume is the default since I haven't changed it.
