I have a fairly large project that has been working quite well. However I am currently struggling with UART ISR that is crashing my program.
Code: Untitled.c Select all
static void Initialize_Port(void)
{
setFlowControlLow();
if (boot)
{
uart_config_t uart_config = {
.baud_rate = MODBUS_DEFAULT_BAUD,
.data_bits = UART_DATA_8_BITS,
.parity = UART_PARITY_DISABLE,
.stop_bits = UART_STOP_BITS_1,
.flow_ctrl = UART_HW_FLOWCTRL_DISABLE};
ESP_ERROR_CHECK(uart_param_config(UART_NUM_1, &uart_config));
ESP_ERROR_CHECK(uart_set_pin(UART_NUM_1, RS485_TXD, RS485_RXD, UART_PIN_NO_CHANGE, UART_PIN_NO_CHANGE));
ESP_ERROR_CHECK(uart_driver_install(UART_NUM_1, 2048, 0, 0, NULL, 0));
ESP_ERROR_CHECK(uart_isr_free(UART_NUM_1));
ESP_ERROR_CHECK(uart_isr_register(UART_NUM_1, uart_intr_handle, NULL, ESP_INTR_FLAG_LOWMED, &handle_console));
uart_disable_tx_intr(UART_NUM_1);
boot = false;
}
void setFlowControlHigh(void)
{
gpio_set_level(RS485_DIR, 1);
}
/**
* @brief Set the Flow Control Pin Low
*
*/
void setFlowControlLow(void)
{
gpio_set_level(RS485_DIR, 0);
}
else
{
uart_set_baudrate(UART_NUM_1, modbus_port.modbus_baud_rate);
uart_set_word_length(UART_NUM_1, UART_DATA_8_BITS); /// esp uart does not support 9 bits
if (modbus_port.modbus_parity == MODBUS_PARITY_NONE)
uart_set_parity(UART_NUM_1, UART_PARITY_DISABLE);
if (modbus_port.modbus_parity == MODBUS_PARITY_ODD)
uart_set_parity(UART_NUM_1, UART_PARITY_ODD);
if (modbus_port.modbus_parity == MODBUS_PARITY_EVEN)
uart_set_parity(UART_NUM_1, UART_PARITY_EVEN);
uart_set_stop_bits(UART_NUM_1, (modbus_port.modbus_stop_bits == MODBUS_STOP_BITS_1) ? UART_STOP_BITS_1 : UART_STOP_BITS_2);
}
}
void esp_transmit_uart(void)
{
uart_disable_rx_intr(UART_NUM_1);
char buffer[2];
modbus_port.master_state = MODBUS_STATE_TRANSMIT;
while (!FIFO_Empty(&FIFO_MODBUS_Tx))
{
sprintf(buffer, "%1c", FIFO_Get(&FIFO_MODBUS_Tx));
if (modbus_debug)
printf("%02X ", buffer[0]);
uart_write_bytes(UART_NUM_1, (const char *)buffer, 1);
}
if (FIFO_Empty(&FIFO_MODBUS_Tx))
{
modbus_port.master_state = MODBUS_STATE_RECEIVE;
setFlowControlLow();
uart_enable_rx_intr(UART_NUM_1);
}
}
static void IRAM_ATTR uart_intr_handle(void *arg)
{
uint16_t rx_fifo_len, status;
uint16_t i=0;
status = UART1.int_st.val; // read UART interrupt Status
FIFO_Flush(&FIFO_MODBUS_Rx);
rx_fifo_len = UART1.status.rxfifo_cnt; // read number of bytes in UART buffer
// if (rx_fifo_len > 9){
// rx_fifo_len = rx_fifo_len -7;
// }
modbus_port.master_state = MODBUS_STATE_PROCESS_RX;
if ( modbus_port.master_state !=2 ){
while(rx_fifo_len){
FIFO_Put(&FIFO_MODBUS_Rx, UART1.fifo.rw_byte); // read all bytes
rx_fifo_len--;
}
}
// after reading bytes from buffer clear UART interrupt status
uart_clear_intr_status(UART_NUM_1, UART_RXFIFO_FULL_INT_CLR|UART_RXFIFO_TOUT_INT_CLR);
// a test code or debug code to indicate UART receives successfully,
// you can redirect received byte as echo also
//uart_write_bytes(UART_NUM_1, (const char*) "RX Done", 7);
}
Core 0 register dump:
PC : 0x40082cea PS : 0x00050034 A0 : 0x4019a19a A1 : 0x3ffbe540
0x40082cea: _xt_lowint1 at D:/esp/esp-IDF/components/freertos/xtensa_vectors.S:1153
0x4019a19a: esp_pm_impl_waiti at D:/esp/esp-IDF/components/esp32/pm_esp32.c:486
A2 : 0x00002068 A3 : 0x3ffbbc10 A4 : 0xc0000000 A5 : 0x3ffbe520
A6 : 0x00000000 A7 : 0x00000001 A8 : 0x800d3f16 A9 : 0x40099ed4
0x40099ed4: _frxt_int_enter at D:/esp/esp-IDF/components/freertos/portasm.S:119
A10 : 0x00000000 A11 : 0x00000070 A12 : 0x800831c4 A13 : 0x3ffbe4f0
A14 : 0x00000000 A15 : 0x00000101 SAR : 0x00000017 EXCCAUSE: 0x00000005
EXCVADDR: 0x00000000 LBEG : 0x00000000 LEND : 0x00000000 LCOUNT : 0x00000000
Core 0 was running in ISR context:
EPC1 : 0x4019a19a EPC2 : 0x00000000 EPC3 : 0x00000000 EPC4 : 0x40082cea
0x4019a19a: esp_pm_impl_waiti at D:/esp/esp-IDF/components/esp32/pm_esp32.c:486
0x40082cea: _xt_lowint1 at D:/esp/esp-IDF/components/freertos/xtensa_vectors.S:1153
ELF file SHA256: e96210a03f2b310cfefc2adbda811d12c5f3081d16d7db0b41cc836038a8e0d3
Backtrace: 0x40082ce7:0x3ffbe540 0x4019a197:0x3ffbbc10 0x400d44ca:0x3ffbbc30 0x4009b911:0x3ffbbc50 0x40099ca9:0x3ffbbc70
0x40082ce7: _xt_lowint1 at D:/esp/esp-IDF/components/freertos/xtensa_vectors.S:1153
0x4019a197: esp_pm_impl_waiti at D:/esp/esp-IDF/components/esp32/pm_esp32.c:484
0x400d44ca: esp_vApplicationIdleHook at D:/esp/esp-IDF/components/esp_common/src/freertos_hooks.c:63
0x4009b911: prvIdleTask at D:/esp/esp-IDF/components/freertos/tasks.c:3382 (discriminator 1)
0x40099ca9: vPortTaskWrapper at D:/esp/esp-IDF/components/freertos/port.c:143
Core 1 register dump:
PC : 0x4019a19a PS : 0x00060f34 A0 : 0x800d44cd A1 : 0x3ffbc380
0x4019a19a: esp_pm_impl_waiti at D:/esp/esp-IDF/components/esp32/pm_esp32.c:486
A2 : 0x00000000 A3 : 0x00000001 A4 : 0x80099eae A5 : 0x3ffbc2b0
A6 : 0x00000003 A7 : 0x00060023 A8 : 0x800d3f16 A9 : 0x3ffbc350
A10 : 0x00000000 A11 : 0x00000001 A12 : 0x00060620 A13 : 0x00000001
A14 : 0x00060620 A15 : 0x3ffbd2b0 SAR : 0x00000000 EXCCAUSE: 0x00000005
EXCVADDR: 0x00000000 LBEG : 0x00000000 LEND : 0x00000000 LCOUNT : 0x00000000
ELF file SHA256: e96210a03f2b310cfefc2adbda811d12c5f3081d16d7db0b41cc836038a8e0d3
Backtrace: 0x4019a197:0x3ffbc380 0x400d44ca:0x3ffbc3a0 0x4009b911:0x3ffbc3c0 0x40099ca9:0x3ffbc3e0
0x4019a197: esp_pm_impl_waiti at D:/esp/esp-IDF/components/esp32/pm_esp32.c:484
0x400d44ca: esp_vApplicationIdleHook at D:/esp/esp-IDF/components/esp_common/src/freertos_hooks.c:63
0x4009b911: prvIdleTask at D:/esp/esp-IDF/components/freertos/tasks.c:3382 (discriminator 1)
0x40099ca9: vPortTaskWrapper at D:/esp/esp-IDF/components/freertos/port.c:143
Rebooting...
I am transmitting data using the esp_transmit_uart function which works as intended when the FIFO buffer is empty i change the flow control to LOW and enable the rx intr. I currently have nothing connected and the ISR is still being triggered and then system crashes. Not sure what is triggering the interrupt. I have tried different interrupt flag however no luck.
Any assistance will be highly appreciated.
