ESP32 Forum

Very cool Rudi. How are you generating the clock?

hi robin

try this:

Code: Select all

..
#include "soc/emac_ex_reg.h"
extern void rtc_plla_ena(bool ena, uint32_t sdm0, uint32_t sdm1, uint32_t sdm2, uint32_t o_div);
..

Code: Select all

PIN_FUNC_SELECT(PERIPHS_IO_MUX_GPIO16_U, FUNC_GPIO16_EMAC_CLK_OUT);
REG_SET_FIELD(EMAC_EX_CLKOUT_CONF_REG, EMAC_EX_CLK_OUT_H_DIV_NUM, 0);
REG_SET_FIELD(EMAC_EX_CLKOUT_CONF_REG, EMAC_EX_CLK_OUT_DIV_NUM, 0);
REG_CLR_BIT(EMAC_EX_CLK_CTRL_REG, EMAC_EX_EXT_OSC_EN);
REG_SET_BIT(EMAC_EX_CLK_CTRL_REG, EMAC_EX_INT_OSC_EN);

think there is a small mistake in the params
but try this:

Code: Select all

// f_out = f_xtal * (sdm2 + 4) / (2 * (o_div + 2))
//   = 40.000.000,00 *  (1 + 4) / (2 * ( 0 + 2) ) 
//   = 40.000.000,00 *  ( 5) / (2 * ( 2) )
//   = 40.000.000,00 *  ( 5) / (4 )
//   = 200.000.000,00  / ( 4 )
//   = 50.000.000,00 
//   = 50 MHz

// param0= ena
// param1=smd2
// param2=o_div
// param3=?
// param4=?

rtc_plla_ena(1, 1, 0, 0, 0); // 50 MHz
// rtc_plla_ena(1, 5, 1, 0, 0); // 60 MHz
// rtc_plla_ena(1, 0, 2, 0, 0); //  20 MHz ( glass clear)

best wishes
rudi

Very cool Rudi. How are you generating the clock?

hi robin

try this:

Code: Select all

..
#include "soc/emac_ex_reg.h"
extern void rtc_plla_ena(bool ena, uint32_t sdm0, uint32_t sdm1, uint32_t sdm2, uint32_t o_div);
..

Code: Select all

PIN_FUNC_SELECT(PERIPHS_IO_MUX_GPIO16_U, FUNC_GPIO16_EMAC_CLK_OUT);
REG_SET_FIELD(EMAC_EX_CLKOUT_CONF_REG, EMAC_EX_CLK_OUT_H_DIV_NUM, 0);
REG_SET_FIELD(EMAC_EX_CLKOUT_CONF_REG, EMAC_EX_CLK_OUT_DIV_NUM, 0);
REG_CLR_BIT(EMAC_EX_CLK_CTRL_REG, EMAC_EX_EXT_OSC_EN);
REG_SET_BIT(EMAC_EX_CLK_CTRL_REG, EMAC_EX_INT_OSC_EN);

think there is a small mistake in the params
but try this:

Code: Select all

// f_out = f_xtal * (sdm2 + 4) / (2 * (o_div + 2))
//   = 40.000.000,00 *  (1 + 4) / (2 * ( 0 + 2) ) 
//   = 40.000.000,00 *  ( 5) / (2 * ( 2) )
//   = 40.000.000,00 *  ( 5) / (4 )
//   = 200.000.000,00  / ( 4 )
//   = 50.000.000,00 
//   = 50 MHz

// param0= ena
// param1=smd2
// param2=o_div
// param3=?
// param4=?

rtc_plla_ena(1, 1, 0, 0, 0); // 50 MHz
// rtc_plla_ena(1, 5, 1, 0, 0); // 60 MHz
// rtc_plla_ena(1, 0, 2, 0, 0); //  20 MHz ( glass clear)

best wishes
rudi

lan8720使用esp的clk工作正常吗？

使用外部clk就涉及到gpio0冲突的问题，现在还没有什么完美的解决方案

#define BASIC_MODE_CONTROL_REG (0x0)
#define SOFTWARE_RESET BIT(15)

#define BASIC_MODE_STATUS_REG (0x1)
#define AUTO_NEGOTIATION_COMPLETE BIT(5)
#define LINK_STATUS BIT(2)

#define PHY_IDENTIFIER_REG (0x2)
#define OUI_MSB_21TO6_DEF 0x0007

#define AUTO_NEG_ADVERTISEMENT_REG (0x4)
#define ASM_DIR BIT(11)
#define PAUSE BIT(10)

#define PHY_LINK_PARTNER_ABILITY_REG (0x5)
#define PARTNER_PAUSE BIT(10)

#define SOFTWARE_STRAP_CONTROL_REG (0x9)
#define SW_STRAP_CONFIG_DONE BIT(15)
#define AUTO_MDIX_ENABLE BIT(14)
#define AUTO_NEGOTIATION_ENABLE BIT(13)
#define AN_1 BIT(12)
#define AN_0 BIT(11)
#define LED_CFG BIT(10)
#define RMII_ENHANCED_MODE BIT(9)

#define PHY_SPECIAL_CONTROL_STATUS_REG (0x1f)
#define AUTO_NEGOTIATION_DONE BIT(12)
#define SPEED_DUPLEX_INDICATION_10T_HALF 0x04
#define SPEED_DUPLEX_INDICATION_10T_FULL 0x14
#define SPEED_DUPLEX_INDICATION_100T_HALF 0x08
#define SPEED_DUPLEX_INDICATION_100T_FULL 0x18
#define SPEED_INDICATION_100T BIT(3)
#define SPEED_INDICATION_10T BIT(2)
#define DUPLEX_INDICATION_FULL BIT(4)

Have you verified the 8710 is working with an external crystal or oscillator? I didn't get an IP until I connected crs/dv to gpio27. Are you seeing the DHCP request on your server?

Robin