ESP32-WROOM-32E-N8R2 PSRAM pins used

[dalbert]

I would like to use the ESP32-WROOM-32E-N8R2 (8MB SPI Flash, 2MB PSRAM) in the next version of a product.

The datasheet makes it clear that IO16 is reserved for the PSRAM CS.
Unfortunately, it doesn't specify which pin is used for PSRAM SCLK.

In the SDK configuration, when configuring PSRAM for ESP32-DOWD, the default pins selected for the PSRAM are:

• PSRAM CLK IO number: 17
• PSRAM CS IO number: 16

So when I have PSRAM enabled in the sdk config and try to use UART2, there is a warning:

Code: Select all

W (1664) uart: GPIO 17 is not usable, maybe used by others

The datasheet indicates that IO16 is reserved (pages 11-12)
"In module variants that have embedded QSPI PSRAM, i.e., that embed ESP32-D0WDR2-V3, IO16 is
connected to the embedded PSRAM and can not be used for other functions"
https://www.espressif.com/sites/default ... eet_en.pdf

However, the GPIO reference indicates that IO16 and IO17
"SPI0/1: GPIO6-11 and GPIO16-17 are usually connected to the SPI flash and PSRAM integrated on the module and therefore should not be used for other purposes."
https://docs.espressif.com/projects/esp ... /gpio.html

It would also be nice to know whether we can use the flash and/or psram in QIO mode (not just DIO).

Bottom line: we need to know how the PSRAM is connected in the ESP32-WROOM-32E-N8R2 in order to configure the pins properly in sdk config.

Is there a technical guide for the WROOM-32E modules that includes the PSRAM? A schematic? Thanks!

[PaulyAnderson]

Hi Dalbert,

I'm also looking to use this version of the ESP; as I understand it, the PSRAM is not on a separate IC as is in the WROVER, the only other IC in this module is the Flash, as in all other WROOMs (have removed the can). The processor is marked as 'R2' , and I have read somewhere that the 2Mb PSRAM is in the processor package, and that you only loose GPIO16 rather than 16&17. Also I think that to enable the PSRAM on this configuration is done differently (not sure how) to the usual way for the WROVER - I have tried the usual way of enabling PSRAM on this module, and it is never found, but enabling it in this usual way does steal pins 16&17.

Did you manage to get the PSRAM recognised on your setup?

I've also read somewhere that this module is supported in the latest IDF, so I'm looking into that - please let me know if you get any further on your quest!

[dalbert]

Hi Pauly,

Yes, the PSRAM is recognized and working in my development boards. My reading also suggested that the PSRAM is internal to the SoC. I had not yet removed the shield, but that was my next step, so thank you for having done that and confirmed it! I have enabled PSRAM in sdk config and have configured it to use IO16 for CS and IO6 for SCLK (shared with the spi flash). I am going to do some more testing, and I'd really like espressif to weigh in with the technical details, but so far it looks like the above configuration works. I can share my sdkconfig setup if that helps.

Code: Select all

I (417) boot: Disabling RNG early entropy source...
I (427) quad_psram: This chip is ESP32-D0WDR2-V3
I (429) esp_psram: Found 2MB PSRAM device
I (429) esp_psram: Speed: 40MHz
I (429) esp_psram: PSRAM initialized, cache is in low/high (2-core) mode.
I (435) cpu_start: Multicore app
I (901) esp_psram: SPI SRAM memory test OK
I (964) cpu_start: Pro cpu start user code
I (965) cpu_start: cpu freq: 160000000 Hz
I (965) app_init: Application information:
I (965) app_init: Project name:     Gateway3_IDF
I (969) app_init: App version:      1
I (972) app_init: Compile time:     May 17 2025 19:28:35
I (977) app_init: ELF file SHA256:  24b99aeb9...
I (982) app_init: ESP-IDF:          v5.4.1-dirty
I (986) efuse_init: Min chip rev:     v0.0
I (990) efuse_init: Max chip rev:     v3.99
I (994) efuse_init: Chip rev:         v3.1
I (998) heap_init: Initializing. RAM available for dynamic allocation:
I (1004) heap_init: At 3FFAE6E0 len 00001920 (6 KiB): DRAM
I (1009) heap_init: At 3FFB56B0 len 0002A950 (170 KiB): DRAM
I (1015) heap_init: At 3FFE0440 len 00003AE0 (14 KiB): D/IRAM
I (1020) heap_init: At 3FFE4350 len 0001BCB0 (111 KiB): D/IRAM
I (1026) heap_init: At 40099960 len 000066A0 (25 KiB): IRAM
I (1031) esp_psram: Adding pool of 2048K of PSRAM memory to heap allocator
I (1039) spi_flash: detected chip: generic
I (1041) spi_flash: flash io: dio
W (1044) spi_flash: Detected size(8192k)

Regards,
David