ESP8266 HARDWARE WDT - What's its purpose?

[mlefevre]

Hi,
I'm trying to find details on how the ESP8266 Hardware WDT works. I've looked in all the seemingly relevant Espressif documentation, but have not found the information I need. Specifically, what does the WDT monitor (what feeds it)? What triggers a timeout? To be clear, I'm not talking about the software WDT that needs to be fed from the application.

This is all I have to go on for the failure I'm seeing:

Code: Select all

ets Jan  8 2013,rst cause:4, boot mode:(3,7)

wdt reset
load 0x4010f000, len 3584, room 16
tail 0
chksum 0xb0
csum 0xb0
v3969889e
~ld
Startup... reset reason: Hardware Watchdog

Any help locating the details I need would be appreciated.

[jaydenkasuo]

It’s tricky because Espressif never really gives a clean spec sheet on the hardware WDT, but here’s what’s been pieced together from SDK code and a lot of trial/error:

The hardware watchdog lives in the RTC side of the chip and keeps an eye on the system task queue (Wi-Fi + RTOS scheduler).

It’s “fed” automatically whenever the CPU returns to the idle/task handler. If you block interrupts for too long or spin in a tight loop, nothing gets fed and the WDT fires.

The rst cause:4 line means exactly that—the hardware watchdog reset because the chip wasn’t letting the scheduler run.

You don’t manually pet this one like the software WDT. The way to stay safe is to yield()/delay() often enough, or move long-running work to a separate task that doesn’t lock the scheduler.

If you want to see it in action, try putting a long critical section with noInterrupts() and you’ll probably get the same boot log you posted.

[MicroController]

I don't know much about the 8266, but usually the watchdog is implemented in hardware and "fed" by software. If the software misbehaves the hardware watchdog will kick in.

In some cases, the hardware watchdog is used by the software as a way to deliberately reset/restart the chip.