Assistance with strategy to connect to I2C charger IC

[bobsmith12]

Working with an ESP32-S3, connecting to a TI I2C charger IC for a battery/solar charge application.

We have one pin on our charger IC that needs to be held at logic level high, which disables the charger. When pulled low, this enables the charger, with a spec of 1uA at 1.8V, and acceptable voltage range of 0-6V Looking for a reliable and safe strategy. Can the MCU provide the pull up voltage? Can it do that in a light and/or deep sleep state?

Another pin on the charger IC provides an open drain FET that is triggered by the charger if a charge source is detected. Because that is open drain, it needs to be held as status high until the charger triggers that FET, reporting status low to the MCU. On this circuit, we need it to wake the MCU from deep sleep. We are looking at RTC pins for this but unsure about the pull up.

As an additional design concern, we have to evaluate if the MCU loses all power, and if we have to provide external pull up power, what that could do to the MCU?

[MicroController]

We have one pin on our charger IC that needs to ... Can the MCU provide the pull up voltage?

If the IC accepts 3.3V as logic high then no problem.

Can it do that in a light and/or deep sleep state?

Yes. The RTC IO pins can keep their output level even in deep sleep.

that is open drain, it needs to be held as status high until the charger triggers that FET, reporting status low to the MCU. On this circuit, we need it to wake the MCU from deep sleep. We are looking at RTC pins for this but unsure about the pull up.

Also not a problem, see https://docs.espressif.com/projects/esp ... akeup-ext0

if the MCU loses all power, and if we have to provide external pull up power, what that could do to the MCU?

That should indeed be avoided. Possibly easiest by connecting the pull-ups to the MCU's 3.3V power rail.

Notice that the ESPs also have internal pull-up and down resistors you can (de)activate from software. They're in the ~50kOhm range, so too weak for I2C but may well be adequate for a (lower-frequency) open-drain "interrupt" signal.