ESP32 Forum

Hello,

We are interested in generating multiple various high frequency clocks using ESP32-C2. We tried using different methods and currently stopped at using the LEDC (LED Control) peripheral to generate the output clocks.

Our implementation is as follows (and uses ESP-IDF V5.4.0):

set_frequence(ledc_timer_w, LEDC_TIMER_W, LEDC_CHANNEL, freq);

void set_frequence(ledc_timer_config_t number_conn, ledc_timer_t number_timer, ledc_channel_t number_channel, int freq_q)
{
ESP_ERROR_CHECK(ledc_timer_config(&number_conn));
ESP_ERROR_CHECK(ledc_set_duty(LEDC_MODE, number_channel, LEDC_DUTY));
ESP_ERROR_CHECK(ledc_set_freq(LEDC_MODE, number_timer, freq_q));
ESP_ERROR_CHECK(ledc_update_duty(LEDC_MODE, number_channel));
}

At some frequencies, such as 5 MHz and 10 MHz, we are able to generate a stable output with a 50% duty cycle.
However, at other frequencies, the duty cycle becomes unstable and fluctuates around 50%.

1. Is our implementation correct for generating high-frequency signals using the LEDC peripheral?
2. Is it technically possible to use the LEDC peripheral to generate frequencies in the 1 MHz – 20 MHz range with a stable 50% duty cycle?
If not, what would be the recommended alternative method or peripheral for generating such frequencies?
3. What is the maximum achievable frequency on the ESP32-C2 that can maintain a precise 50% duty cycle using LEDC or any other method?

Thanks in advance.

ESP8684 TRM v1.3, "22.3.2.2 Clock Divider Configuration":

[Depending on the configured PWM frequency,] LEDC_CLK_DIV becomes a non-integer divisor. The [LEDC's] clock divider implements non-integer frequency division by alternating between A and (A+1) LEDC_CLKx clock pulses per ref_pulsex clock pulse. This will result in the average frequency of ref_pulsex clock pulse being the desired frequency