Making both ULP_FSM and ULP_RISCV available, Micropython on Esp32-S3

[Filedyne]

Hello everyone!

I have been running a self compiled version of MicroPython for many years now. I usually add some extra C-Modules to bring up speed for some tasks, like "Integer FFT", and sometimes just adding new features(like VGA out on both ESP32 and ESP32-S3). I have used ULP (in FSM mode) for many projects before with very good battery performance.

I recently got interested in using ULP in riscv mode in same build, and I actually got it working!

The issue: To make it wake up from ULP_RISCV, I had to modify "components/esp_hw_support/sleep_modes.c".
-Documentation say "compile for ULP_FSM OR ULP_RISCV".
The solution (quick and dirty):
-It is only possible to RUN one of them at a time, that is totally OK.
-The one (FSM/RISCV) that is NOT running, can also not set wake-up signals, because it is stopped.
-The trick I used was to set both the FSM wake-up flag AND the RISCV flags.
( in esp_sleep_start() and esp_sleep_enable_ulp_wakeup() )

(It would have been great to be able to just enable both from sdkconfig...)
Does anyone have a better solution for this ?

esp-idf v5.5.2 / micropython 1.27.0( custom )