Technical Inquiry: ESP32-P4 MIPI CSI Virtual Channel and USB HS Support

ohsh0012
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Joined: Mon Feb 09, 2026 8:02 am

Technical Inquiry: ESP32-P4 MIPI CSI Virtual Channel and USB HS Support

Postby ohsh0012 » Mon Feb 09, 2026 8:20 am

I am planning to develop a vision system using the ESP32-P4-Pico board and have some critical technical questions regarding the hardware limitations of the ESP32-P4 (Chip Revision v1.3).

My project requires receiving 2-channel RAW data (320x240 @30fps) simultaneously via MIPI CSI-2, where the sensor outputs data using Virtual Channel 0 and Virtual Channel 1.

1. MIPI CSI Virtual Channel Support: I found a note in the Technical Reference Manual (v0.2 Pre-release) stating: "ESP32-P4 does not support different virtual channels defined in the MIPI specification, so virtual channel numbers in the packet header are ignored." Does this mean it is hardware-impossible to de-interleave VC0 and VC1 data into separate memory buffers using the CSI Bridge/DMA? If so, is there any recommended hardware workaround or plans for future revision updates?

2. USB High-Speed (480 Mbps) Support on Pico Board: The project requires a throughput of approximately 9-10 MB/s (72-80 Mbps) for 2-channel video streaming. Does the ESP32-P4-Pico board from Waveshare fully support USB 2.0 High-Speed (480 Mbps) on its OTG port? I noticed some sections in the manual mentioning a 12 Mbps (Full Speed) limit for the "USB-Serial-JTAG" controller, and I want to confirm the OTG port's capability for high-bandwidth video data.

3. BitScrambler for De-interleaving: If Virtual Channel IDs are indeed ignored, can the BitScrambler peripheral be used to de-interleave the merged data stream in real-time as it is written to PSRAM?

I look forward to your professional guidance.

igi540
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Joined: Thu Jan 23, 2025 1:00 pm

Re: Technical Inquiry: ESP32-P4 MIPI CSI Virtual Channel and USB HS Support

Postby igi540 » Wed Feb 11, 2026 2:19 pm

1) CSI-2 Virtual Channels (VC0/VC1)

The ESP32-P4 CSI receiver ignores the CSI-2 Virtual Channel field and the TRM also says VC interleaving is not supported. So, you can’t de-interleave VC0/VC1 into separate buffers via CSI Bridge/DMA in hardware.

Workaround: configure the sensor to output a single VC, or use external hardware (FPGA/bridge) to repack the streams.

2) USB 2.0 High-Speed on Waveshare ESP32-P4-Pico

The Waveshare ESP32-P4-Pico documentation describes the OTG port as USB OTG 2.0 High-Speed (HS), so it should support 480 Mbps, and your 9–10 MB/s target is within HS capability.

3) BitScrambler for de-interleaving

BitScrambler is a DMA data reformatter, not a CSI-2 packet/VC demux engine. If VC IDs are ignored by the CSI hardware, BitScrambler won’t reliably split VC0/VC1 into two real-time buffers.

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