ESP32-S3 PIE calling convention

Bryght-Richard
Posts: 98
Joined: Thu Feb 22, 2024 3:59 pm

ESP32-S3 PIE calling convention

Postby Bryght-Richard » Thu May 07, 2026 4:17 pm

Is there a recommended calling convention for stacking the SIMD/PIE registers across function and subroutine calls?

Which registers are preserved by the RTOS?

Are there registers I should preserve before using?

MicroController
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Joined: Mon Oct 17, 2022 7:38 pm
Location: Europe, Germany

Re: ESP32-S3 PIE calling convention

Postby MicroController » Thu May 07, 2026 8:16 pm

Is there a recommended calling convention for stacking the SIMD/PIE registers across function and subroutine calls?
There is no calling convention, and accordingly no compiler support. In theory, every function call may clobber any and all PIE registers/state.
OTOH you can implement your own "convention", or just avoid calls to "3rd-party" functions in the middle of PIE instruction sequences. I find this not hard to do because in the high-performance sections I don't want to do "slow" function calls anyway.
In C++ I also found it useful to use template functions, where the Q registers to use by a function are template parameters - so defined explicitly by the caller.
Lastly, saving or restoring a Q register (except QACC) to/from an (aligned) location on the stack can be as little as 1 clock cycle each, so it's actually pretty cheap to do.

That said, neither the compiler, nor libc(++), nor the IDF use any PIE instructions or registers; but libraries like esp-dsp or esp-dl do.

In practice I never had the need to save/restore any PIE state, because the PIE code sections tend to be small and self-contained.

Which registers are preserved by the RTOS?
FreeRTOS saves/restores the full PIE "coproc" state upon context switch if needed, so nothing to worry about there.

Are there registers I should preserve before using?
Nope.

(On a note, some of the SIMD instructions (VMUL...) use the value from the Xtensa core "shift amount register" ("special register SAR") which is also used by the compiler, so may be "clobbered" at any time "outside" of assembly code.)

Bryght-Richard
Posts: 98
Joined: Thu Feb 22, 2024 3:59 pm

Re: ESP32-S3 PIE calling convention

Postby Bryght-Richard » Mon May 11, 2026 6:46 pm

Thanks Microcontroller! That's really helpful.

> (On a note, some of the SIMD instructions (VMUL...) use the value from the Xtensa core "shift amount register" ("special register SAR") which is also used by the compiler, so may be "clobbered" at any time "outside" of assembly code.)

I'll be sure to save and restore SAR when needed. I don't need to use it though.

>In C++ I also found it useful to use template functions, where the Q registers to use by a function are template parameters - so defined explicitly by the caller.

I like this approach, quite handy!

MicroController
Posts: 2661
Joined: Mon Oct 17, 2022 7:38 pm
Location: Europe, Germany

Re: ESP32-S3 PIE calling convention

Postby MicroController » Mon May 11, 2026 8:41 pm

>In C++ I also found it useful to use template functions, where the Q registers to use by a function are template parameters - so defined explicitly by the caller.

I like this approach, quite handy!
Can look like this for example :)

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