ESP32-S3 has granular/partial PSRAM encryption support ?

[Baldhead]

Hi everyone,

I am looking into the recent MMU driver updates (esp_mm) in the master branch of ESP-IDF.
I noticed the introduction of flags like MMU_MEM_CAP_ENCRYPT and updated APIs that seem to handle memory encryption capabilities at a page/block level.
Given that the ESP32-S3 shares the same MSPI bus lines (D0-D7, CLK) for both Flash and PSRAM within the SiP/module, I would like to get a definitive confirmation regarding hardware limitations:
Does the ESP32-S3 EXTMEM/MMU hardware actually support partial or page-level encryption toggling for the PSRAM ? Or is it strictly a global "all-or-nothing" configuration tied to EXTMEM_SHARE_ENC_EN ?
If a developer attempts to use the new unified esp_mm encryption flags targets on an ESP32-S3 target, will the HAL layer simply fall back or return an error due to the lack of hardware address-masking registers in the S3 silicons ?I

Suspect this granular capability is exclusive to newer chips like the ESP32-P4 (which has independent buses), and that on the S3, exposing decrypted PSRAM data on the shared SPI wires would leak the firmware anyway.
Could anyone from the Espressif team confirm if there will ever be stable support for partial PSRAM decryption on the ESP32-S3, or if it is physically impossible due to the EXTMEM hardware architecture ?

Note:
I would like to create 2 big frame buffers without encryption. Today, I use encryption for everything.

Thanks in advance.