chip reset problem

roctwo
Posts: 95
Joined: Mon Nov 28, 2016 3:12 am

chip reset problem

Postby roctwo » Tue Dec 06, 2016 7:52 am

In my project, my program have not stop, but the chip is reset, and the log is :rst:0x8 (TG1WDT_SYS_RESET). Please give me an answer :) :) :)

WiFive
Posts: 2694
Joined: Tue Dec 01, 2015 7:35 am

Re: chip reset problem

Postby WiFive » Tue Dec 06, 2016 8:39 am


zhivko
Posts: 22
Joined: Tue Dec 01, 2015 12:02 pm

Re: chip reset problem

Postby zhivko » Wed Dec 07, 2016 9:58 am

We know wifi is critical for working - couldn't we somehow dedicate wifi to run on first core and user program on another?
Is rtos mixing first and second core for all task including user tasks and wifi tasks?

jumjum123
Posts: 188
Joined: Mon Oct 17, 2016 3:11 pm

Re: chip reset problem

Postby jumjum123 » Wed Dec 07, 2016 10:58 am

Assign a task to specified core with xTaskCreatePinnedToCore

ESP_Sprite
Posts: 2832
Joined: Thu Nov 26, 2015 4:08 am

Re: chip reset problem

Postby ESP_Sprite » Thu Dec 08, 2016 1:26 am

Also, do you get just a watchdog reset with nothing preceding it, or do you actually get a panic handler message?

roctwo
Posts: 95
Joined: Mon Nov 28, 2016 3:12 am

Re: chip reset problem

Postby roctwo » Fri Dec 09, 2016 12:44 am

ESP_Sprite wrote:Also, do you get just a watchdog reset with nothing preceding it, or do you actually get a panic handler message?
In the task handler created by xTaskCreate,the code:
...
ESP_LOGI(TAG, "ESP32 start send data...");
while(1) {
err = netconn_send(udpclient_conn, udpclient_sendbuf);
}
...
each time after the handler netconn_send have excuted, there will be the a chip reset,the log is :
----------------------------------------------------------------------------------------------
rst:0x8 (TG1WDT_SYS_RESET),boot:0x13 (SPI_FAST_FLASH_BOOT)
configsip: 0, SPIWP:0x00
clk_drv:0x00,q_drv:0x00,d_drv:0x00,cs0_drv:0x00,hd_drv:0x00,wp_drv:0x00
mode:DIO, clock div:2
load:0x3ffc0008,len:0
load:0x3ffc0008,len:1964
load:0x40078000,len:3648
ho 0 tail 12 room 4
load:0x40080000,len:256
entry 0x40080034

[0;32mI (540) heap_alloc_caps: Initializing heap allocator:[0m
[0;32mI (541) heap_alloc_caps: Region 19: 3FFC1444 len 0001EBBC tag 0[0m
[0;32mI (544) heap_alloc_caps: Region 25: 3FFE8000 len 00018000 tag 1[0m
[0;32mI (564) cpu_start: Pro cpu up.[0m
[0;32mI (575) cpu_start: Starting app cpu, entry point is 0x40080b84[0m
[0;32mI (0) cpu_start: App cpu up.[0m
[0;32mI (606) cpu_start: Pro cpu start user code[0m
rtc v118 Oct 19 2016 15:22:11

XTAL 40M
[0;32mI (672) cpu_start: Starting scheduler on PRO CPU.[0m
[0;32mI (77) cpu_start: Starting scheduler on APP CPU.[0m

tcpip_task_hdlxxx : 3ffc5ac0, prio:18,stack:2048
frc2_timer_task_hdl:3ffc7524, prio:22, stack:2048

phy_version: 187, Oct 10 2016, 19:23:46, 0

I (257) wifi: pp_task_hdl : 3ffc9d84, prio:23, stack:8192
[0;32mI (257) Log_Test: Setting WiFi configuration SSID ESP32-AP...[0m
mode : sta(24:0a:c4:01:ad:dc)

I (1137) wifi: n:6 0, o:1 0, ap:255 255, sta:6 0, prof:1

I (3067) wifi: state: 0 -> 2 (b0)

I (3077) wifi: state: 2 -> 2 (4a0)

I (4067) wifi: state: 2 -> 0 (2)

I (4497) wifi: n:6 0, o:6 0, ap:255 255, sta:6 0, prof:1
I (4497) wifi: state: 0 -> 2 (b0)
I (4497) wifi: state: 2 -> 3 (0)

I (4507) wifi: state: 3 -> 5 (10)

I (4527) wifi: connected with ESP32-AP, channel 6

[0;32mI (7087) event: ip: 192.168.43.174, mask: 255.255.255.0, gw: 192.168.43.1[0m
[0;32mI (7087) Log: ESP32 have connected to AP
[0;32mI (7587) Log:ESP32 start send data...[0m
---------------------------------------------------

then the chip will be reset again, I don't konw how to solve this problem???

ESP_igrr
Posts: 1515
Joined: Tue Dec 01, 2015 8:37 am

Re: chip reset problem

Postby ESP_igrr » Fri Dec 09, 2016 2:46 am

Do you get the same result if you enable "Run FreeRTOS only on the first core" option in menuconfig (component config > FreeRTOS)?

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