Search found 14 matches
- Wed Apr 22, 2026 9:47 pm
- Forum: Hardware
- Topic: Need guidelines: wiring and configuring an external 32Khz oscillator input in EDP-IDF
- Replies: 14
- Views: 22932
Re: Need guidelines: wiring and configuring an external 32Khz oscillator input in EDP-IDF
Thank you. I think EspressIF needs to weigh in here. Both their documentation and even this thread contains wildly different and contradictory information. Some places say that the external clock should connect to XP, others to XN. Some way less than 1V, some say more than 1v7. Some suggest you ...
- Wed Apr 22, 2026 12:49 am
- Forum: Hardware
- Topic: Need guidelines: wiring and configuring an external 32Khz oscillator input in EDP-IDF
- Replies: 14
- Views: 22932
Re: Need guidelines: wiring and configuring an external 32Khz oscillator input in EDP-IDF
Would someone at EspressIF please provide up-to-date information regarding how to connect an external 32.768kHz oscillator to the ESP32 (I'm using the ESP32-WROOM-32E) and the software configuration for using it (ESP-IDF) for the RTC?
I am using an external TCXO that produces a 3v3 square wave ...
I am using an external TCXO that produces a 3v3 square wave ...
- Wed Jul 30, 2025 2:33 pm
- Forum: ESP-IDF
- Topic: Is gpio_intr_enable() safe to call from ISR?
- Replies: 2
- Views: 145
Is gpio_intr_enable() safe to call from ISR?
The documentation shows that it is safe to call gpio_intr_disable() from an ISR if CONFIG_GPIO_CTRL_FUNC_IN_IRAM is enabled, but does not have the same note for gpio_intr_enable(). I see no difference in their code and haven't seen any issues when using it, but I'd like to be sure. Does anyone know ...
- Sun May 18, 2025 6:54 pm
- Forum: Hardware
- Topic: ESP32-WROOM-32E-N8R2 PSRAM pins used
- Replies: 2
- Views: 474
Re: ESP32-WROOM-32E-N8R2 PSRAM pins used
Hi Pauly,
Yes, the PSRAM is recognized and working in my development boards. My reading also suggested that the PSRAM is internal to the SoC. I had not yet removed the shield, but that was my next step, so thank you for having done that and confirmed it! I have enabled PSRAM in sdk config and have ...
Yes, the PSRAM is recognized and working in my development boards. My reading also suggested that the PSRAM is internal to the SoC. I had not yet removed the shield, but that was my next step, so thank you for having done that and confirmed it! I have enabled PSRAM in sdk config and have ...
- Sat May 17, 2025 4:17 pm
- Forum: Hardware
- Topic: ESP32-WROOM-32E-N8R2 PSRAM pins used
- Replies: 2
- Views: 474
ESP32-WROOM-32E-N8R2 PSRAM pins used
I would like to use the ESP32-WROOM-32E-N8R2 (8MB SPI Flash, 2MB PSRAM) in the next version of a product.
The datasheet makes it clear that IO16 is reserved for the PSRAM CS.
Unfortunately, it doesn't specify which pin is used for PSRAM SCLK.
In the SDK configuration, when configuring PSRAM for ...
The datasheet makes it clear that IO16 is reserved for the PSRAM CS.
Unfortunately, it doesn't specify which pin is used for PSRAM SCLK.
In the SDK configuration, when configuring PSRAM for ...
- Thu May 15, 2025 11:31 pm
- Forum: General Discussion
- Topic: esp_ping default stack is insufficient
- Replies: 2
- Views: 94
Re: esp_ping default stack is insufficient
Thanks for the suggestion; I added the following to the esp_ping_thread()
if (ep->on_ping_end) {
// Check stack usage
UBaseType_t uxHighWaterMark;
uxHighWaterMark = uxTaskGetStackHighWaterMark( NULL );
ep->on_ping_end((esp_ping_handle_t)ep, (void *)uxHighWaterMark);
}
Then printed the ...
if (ep->on_ping_end) {
// Check stack usage
UBaseType_t uxHighWaterMark;
uxHighWaterMark = uxTaskGetStackHighWaterMark( NULL );
ep->on_ping_end((esp_ping_handle_t)ep, (void *)uxHighWaterMark);
}
Then printed the ...
- Wed May 14, 2025 7:08 am
- Forum: General Discussion
- Topic: esp_ping default stack is insufficient
- Replies: 2
- Views: 94
esp_ping default stack is insufficient
Using ESP IDF 5.4.1 and esp_modem with the esp_ping reference code. The default ping task stack size using ESP_PING_DEFAULT_CONFIG() is 2.5K and with that stack size, I frequently get exceptions on ping_end (as the stack unwinds). Increasing the stack size to 4K completely eliminates the exceptions ...
- Fri Apr 12, 2024 4:54 am
- Forum: ESP32 Arduino
- Topic: ESP32 External 32.768kHZ Crystal for RTC
- Replies: 11
- Views: 16592
Re: ESP32 External 32.768kHZ Crystal for RTC
Something to be aware of:
The ESP32 r1 and r3 require different loading for the crystal oscillator.
I use a 6pF 3.2x1.5mm 2-SMD crystal with two loading caps, all located close to the XO pins and following good layout practices.
My older boards built with ESP32 r1 require at least 10pF load ...
The ESP32 r1 and r3 require different loading for the crystal oscillator.
I use a 6pF 3.2x1.5mm 2-SMD crystal with two loading caps, all located close to the XO pins and following good layout practices.
My older boards built with ESP32 r1 require at least 10pF load ...
- Thu Apr 11, 2024 8:09 pm
- Forum: ESP-IDF
- Topic: API to access last exception details?
- Replies: 1
- Views: 947
API to access last exception details?
Is there an API to access the last exception address(es) or backtrace(es)?
This would be incredibly helpful for debugging remote equipment in the field so that after a reset, it could report not just the reason for reset, but the address(es) or backtrace(es) indicating where the exception took place.
This would be incredibly helpful for debugging remote equipment in the field so that after a reset, it could report not just the reason for reset, but the address(es) or backtrace(es) indicating where the exception took place.
- Tue Nov 07, 2023 5:39 pm
- Forum: ESP32 Arduino
- Topic: SPI semaphore trips wdt when light sleep enabled
- Replies: 1
- Views: 2070
Re: SPI semaphore trips wdt when light sleep enabled
For anyone else who encounters this, it turned out to be pilot error: accessing the SPI bus from both interrupt and user contexts.
The light sleep being enabled was a red herring, it simply affected timing. I use the SPI bus to manage a radio transceiver extensively in interrupt context and ...
The light sleep being enabled was a red herring, it simply affected timing. I use the SPI bus to manage a radio transceiver extensively in interrupt context and ...