Code: Select all
E (187) esp_core_dump_flash: Core dump flash config is corrupted! CRC=0x7bd5c66f instead of 0x0
E (195) esp_core_dump_elf: Elf write init failed!
E (200) esp_core_dump_common: Core dump write failed with error=-1
Rebooting...
ESP-ROM:esp32s3-20210327
Build:Mar 27 2021
rst:0xc (RTC_SW_CPU_RST),boot:0x8 (SPI_FAST_FLASH_BOOT)
Saved PC:0x403765e1
SPIWP:0xee
mode:DIO, clock div:1
load:0x3fce2820,len:0x1180
load:0x403c8700,len:0xc2c
load:0x403cb700,len:0x311c
entry 0x403c88b8
E (24) qio_mode: Failed to set QIE bit, not enabling QIO mode
Guru Meditation Error: Core 0 panic'ed (IllegalInstruction). Exception was unhandled.
I'm not sure if the S3R8V has different configuration requirements or maybe I'm using a pin I'm not supposed to? I attached an image of my pin usage for reference and I'm happy to provide more info. Here is the esptool output I get from my board:
Code: Select all
esptool v5.0.2
Connected to ESP32-S3 on COM14:
Chip type: ESP32-S3 (QFN56) (revision v0.1)
Features: Wi-Fi, BT 5 (LE), Dual Core + LP Core, 240MHz, Embedded PSRAM 8MB (AP_1v8)
Crystal frequency: 40MHz
USB mode: USB-Serial/JTAG
MAC: 7c:df:a1:f9:e8:f4
Stub flasher running.
Flash Memory Information:
=========================
Manufacturer: c2
Device: 2538
Detected flash size: 16MB
Flash type set in eFuse: quad (4 data lines)
Flash voltage set by eFuse: 3.3V
IO45/46 are floating on my current hardware and I used SPICLK_N and SPICLK_P for enable signals. This seems like a hardware issue but I'm not sure where to look.
This is my first esp32 design and I'm a little stumped here. Any help would be appreciated.
Thanks in advance!
